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Performance validation, while often critical, is usually implemented as an afterthought, leading to inefficiencies. A case study of an Arm Cortex-M3 based automotive companion chip with numerous bus masters and slaves is presented. The ad-hoc approach for performance validation proved inefficient due to conditions such as: • Different protocol interfaces at source and destination • Addition of new paths for the derivative SoCs • Path-specific measurement requirements To overcome these inefficiencies, a generic plug-and-play performance monitor component was developed. The monitor is protocol-independent, and easily integrated into a SoC verification environment. A significant improvement in performance verification closure was achieved as a result.
1. A case study on how performance validation can be done efficiently when functionally verifying an automotive SoC.
2. Scenarios that make performance validation hard to scale
3. Architecture for a reusable verification component that has been successfully deployed across multiple projects.