Arm TechCon 2017 Schedule

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Efficient Register Transfer Level Fault Analysis for Automotive Designs

  • Joe Hupcey (Marketing Product Manager, Formal Verification, Mentor, A Siemens Business)
  • Ping Yeung (Formal & CDC Verification Technologist, Mentor, A Siemens Business)
Pass Types: All-Access Pass, Training Pass, Arm Mbed Connect Pass, Expo Pass - Get your pass now!
Track: Sponsored Sessions (Free)
Format: 50-Minute Technical Session
Audience Level: Introductory
Recording: Video

The automotive safety standard, ISO 26262, states that safety analyses on hardware design should include Failure Mode and Effects Analysis (FMEA). Hardware architectural metrics are required to assess the adequacy of the safety mechanisms and their ability to prevent faults from reaching safety critical areas. A process of fault analysis including fault injection is crucial in measuring and cross checking the FMEA. Fault injection is an essential method to determine the completeness and correctness of the safety mechanisms in meeting hardware safety requirements. In this session, we examine the process of fault analysis. Our goal is to perform it early in the design cycle at the RTL so that various optimizations and tradeoffs can be made. To improve efficiency in our flow, static fault pruning is performed ahead of time to determine the set of design elements to inject faults. Then, a golden (no fault) model and a fault injected model are used to perform on-the-fly fault injection. Formal sequential logic equivalence checking (SLEC) is used to analyze the results and to determine the effectiveness of the safety mechanisms.